device control (p18cv8)
"Simple controller for testing multiply unit - CGA 2000-2001"
"Supports only Mode 3 Unsigned"

pin
	CLOCK		=	1	(clk_input)
	nRESET		=	2	(input combinatorial)

	Start		=	3	(input combinatorial)
	LsbB		=	4	(input combinatorial)
	EmptyB		=	5	(input combinatorial)
	FullB		=	6	(input combinatorial)
	
	UpdateA		=	12	(output com active_high feed_pin)
	UpdateB		=	13	(output com active_high feed_pin)
	UpdateP		=	14	(output com active_high feed_pin)
	Shift		=	15	(output reg active_high feed_pin)
	ZeroP		=	16	(output reg active_high feed_pin)
	Subtract	=	17	(output com active_high feed_pin)
	EnableP		=	18	(output reg active_high feed_pin)

	state		=	19	(output reg active_high feed_reg)

;


begin
	enable	(UpdateA, UpdateB, UpdateP, Shift, ZeroP, Subtract, EnableP);

	reset	(Shift, ZeroP, EnableP, state)  =  /nRESET;
	

        "one hot state machine"
        ZeroP = Start * /(ZeroP+state+Shift+EnableP);
        state = ZeroP;
        Shift = state + (Shift * /EmptyB);
        EnableP = Shift * EmptyB;

        "other signals"
        UpdateA = ZeroP + Shift;
        UpdateB = state + Shift;
        UpdateP = ZeroP + (Shift * LsbB);
        Subtract = 0;

end.

test_vectors

in nRESET, CLOCK, Start, LsbB, EmptyB, FullB;
out UpdateA, UpdateB, UpdateP, Shift, ZeroP, Subtract, EnableP;

begin

	0 0	0 000	LLLLLLL;
	1 0	0 000	LLLLLLL;
	1 C	0 000	LLLLLLL;
	1 C	1 000	HLHLHLL;
	1 C	0 000	LHLLLLL;
	1 C	0 000	HHLHLLL;
	1 C	0 000	HHLHLLL;
	1 C	0 100	HHHHLLL;
	1 C	0 000	HHLHLLL;
	1 C	0 100	HHHHLLL;
	1 C	0 100	HHHHLLL;
	1 C	0 010	LLLLLLH;
	1 C	0 010	LLLLLLL;
	1 C	0 010	LLLLLLL;

end.